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Q1 2020

QUARTERLY NEWSLETTER – Q1 2020

Looking Ahead to 2020 from Northwest Logic, now part of Rambus 

Northwest Logic is now part of Rambus Inc., a premier silicon IP and chip provider. We are now proud to offer comprehensive memory and SerDes IP solutions, including PHYs and controllers. We continue to offer standalone controllers, providing customers with the ability to get the solution that exactly matches their needs. We look forward to serving our existing ASIC and FPGA customers with a full range of IP solutions.

“Northwest Logic’s product lineup and expertise are a great complement to our current portfolio and serve a critical role in our customers’ success.”

-Luc Seraphin, CEO, Rambus

For more information about the acquisition, visit rambus.com/northwestlogic. Or, contact us to discuss how we can help you with your market leading solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications.

Rambus will be at DesignCon 2020

Rambus will be in booth #1035 at DesignCon 2020 in Santa Clara, CA, Jan 28-30, 2020 presenting HBM2, GDDR6 and 112 Gbit/s SerDes demos. Rambus will also be hosting free training sessions on a variety of topics including automotive, memory, 5G and packaging options on Wednesday, January 29th. If you would like to have a face-to-face meeting to discuss our latest Memory (HBM2/2E, GDDR6), PCIe (Gen 5/4, DMA) or MIPI IP (CSI-2, DSI-2) solutions, click here.

The Rambus’s Full-Featured, High-Performance PCI Express™ 5.0
Solution Available Now!

Rambus has been delivering PCI Express® solutions for more than a decade. These solutions have been used in many designs including Data Storage, Communications, Broadcast, Military and Medical applications in ASIC, structured ASIC and FPGA platforms. Rambus now offers a complete interface solution for PCI Express 5.0, including a PCI Express PHY and PCI Express 5.0 Core. The PCI Express 5.0 Core offers a rich feature-set including:

  • PCI Express™ 5.0 specification compliant-backward compatible with PCIe 4/3/2/1
  • x16, x8, x4, x2, x1 lane with bifurcation support
  • 32 Gbit/s SERDES, RP, EP, Switch support
  • Endpoint, Root Port, Switch support
  • High-performance, easy-to-use core with optional scatter-gather DMA support
  • Available with Rambus PCIe Gen 5 PHY for ASIC designs

This PCI Express 5.0 Core provides a robust, high-performance platform for developing PCI Express™ 5.0 based products and is already been designed into new ASIC PCIe Gen 5 designs. Contact Rambus for more information on how to start your PCIe™ 5.0 design now!

Rambus 16Gbps GDDR6 PHY and Controller Achieved Qualification in 4Q19

The Rambus 16 Gbps GDDR6 PHY and Controller solution has completed silicon qualification and is now production ready. Rambus is the first company to provide a silicon-proven 16 Gbps GDDR6 memory subsystem, and has demonstrated operation up to 18 Gbps. Announced earlier this year, the GDDR6 silicon was taped out on an advanced process node and is well suited for data center, AI/ML, high-performance computing (HPC), automotive and networking applications, that need higher bandwidth memory. Rambus is an early promoter of GDDR6 technology and has been working closely with customers to bring this technology to market. Achieving first silicon success at 18 Gbps is a testament to product quality and first-time right silicon that customers have come to expect from Rambus. Learn how Rambus can help you with a comprehensive high-performance memory PHY and controller solution that meets your compute-intensive needs. Please contact Rambus for more information.

Rambus GDDR6 and LPDDR4 Controller Core Now Available with In-Line ECC

Rambus now offers In-Line ECC support with its GDDR6 Controller Core and LPDDR4 Controller Core. This support enables efficient single bit correction and double bit error detection using the same memory for both user and ECC data. Traditional, Out-Of-Band ECC requires a separate memory for user and ECC data. In-Line ECC is particularly useful for GDDR6 and LPDDR4 applications because those memories do not support the smaller data widths needed to efficiently implement Out-Of-Band ECC. This support enables highly differentiated solutions for high-performance networking, autonomous vehicles, artificial intelligence, and 5G infrastructure applications. Click here for more information.

Rambus DSI-2 Controller Core Now Available with Full Featured Video Interface

The Rambus DSI Controller core is now available with a full featured DSI-2 Video Interface. This DSI-2 Video Interface is a superset of the DPI-2 Interface adding support for all DSI-2 data types, multiple pixel per clock support, and enhanced retiming with this Hsync/Vsync style interface. Contact us to learn more about how we can help you with all of your MIPI design requirements.

AED Engineering Leverages Rambus’ CSI-2 Controller Cores in SERDES Logging Adapter

AED Engineering, a one-of-a-kind provider of electrics/electronics engineering services, offers a CSI-2 Tx and CSI-2 Rx interface in their SerDes Logging Adapter (SLA). The SLA with time stamped CSI-2 packet recording and retransmission eases validation of automated driving functionalities requiring precisely recorded data from vehicle sensors like video or radar based on real driving scenes. “Rambus’ high-quality IP and excellent technical support enabled our product team to create our unique time stamped CSI-2 interface system,” said Ralf Mayer, Design Architect at AED Engineering. Please contact Rambus or AED Engineering for more information.


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