Memory Interface Solution

Northwest Logic's high-performance, high quality, easy-to-use IP cores are optimized for use in both ASICs and FPGAs. Each core is available in source code and netlist formats and is provided with a testbench and expert technical support.

Memory-Interface-Solution-Recovered

Memory Interface Solution Overview

Memory Controller Cores

HBM (Whitepaper) MRAM
DDR4 DDR3 DDR2 DDR
LPDDR4 LPDDR3 LPDDR2 Mobile DDR
RLDRAM 3 RLDRAM II SDR Mobile SDR

Add-On Cores

Bus Interface Multi-Port Reorder Read-Modify-Write
ECC Memory Test Mem Test Analyzer

DDR PHY

ASIC DDR Third Party

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